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The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an integral part of a microprocessor; in the latter case, it is usually called an integrated memory controller (IMC). A memory controller is sometimes also called a memory chip controller (MCC)〔Comptia A+ Certification Exam Guide, Seventh Edition, by Mike Meyers, in the glossary, bottom of page 1278: "Chip that handles memory requests from the CPU."〕 or a memory controller unit (MCU).〔(【引用サイトリンク】title=Maximizing Performance and Scalability with IBM WebSphere )〕 == History == Computers using Intel microprocessors have traditionally had a memory controller implemented on their motherboard's northbridge, but many modern microprocessors, such as DEC/Compaq's Alpha 21364, AMD's Athlon 64 and Opteron processors, IBM's POWER5, Sun Microsystems's UltraSPARC T1, and more recently Intel's Core i7 and Core i5 CPUs have an ''integrated memory controller'' (IMC) on the microprocessor in order to reduce memory latency. While an integrated memory controller has the potential to increase the system's performance, it locks the microprocessor to a specific type (or types) of memory, forcing a redesign in order to support newer memory technologies. When DDR2 SDRAM was introduced, AMD released new Athlon 64 CPUs. These new models, with a DDR2 controller, use a different physical socket (known as Socket AM2), so that they will only fit in motherboards designed for the new type of RAM. When the memory controller is not on-die, the same CPU may be installed on a new motherboard, with an updated northbridge. The integration of the memory controller onto the die of the microprocessor is not a new concept. Some microprocessors in the 1990s, such as the DEC Alpha 21066 and HP PA-7300LC, had integrated memory controllers; however, rather than for performance gains, this was implemented to reduce the cost of systems by eliminating the need for an external memory controller. Some CPUs are designed to have their memory controllers as dedicated external components that are not part of the chipset. An example is IBM POWER8, which uses external Centaur chips that are mounted onto DIMM modules and act as memory buffers, L4 cache chips, and as the actual memory controllers. The current Centaur chip is using DDR3 memory but a future version can use DDR4 or some other memory technology without need to swap the POWER8 chip itself. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「memory controller」の詳細全文を読む スポンサード リンク
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